Short answer: Intel Arc Pro B60 and B65 publish the same 20 Xe-cores, 160 XMX engines, 2400MHz graphics clock, 12.28 FP32 TFLOPS, 197 INT8 TOPS and 200W headline board power. B65’s advantage is not a larger compute configuration: it adds 8GB of memory, raises published bandwidth from 456GB/s to 608GB/s and moves from PCIe 5.0 x8 to x16. Choose by capacity, exact partner board, software behavior and measured workload—not the higher product number alone.
Same compute resources, different memory system: B60 is the 24GB tier; B65 is the 32GB tier. Both are partner-card products, so connector, dimensions, cooling and warranty must be checked on the board you can actually buy.
Arc Pro B60 vs B65 specifications
| Specification | Arc Pro B60 | Arc Pro B65 | Decision meaning |
|---|---|---|---|
| Memory | 24GB GDDR6, 192-bit | 32GB GDDR6, 256-bit | B65 adds 8GB and changes upper model-fit boundaries |
| Bandwidth | 456GB/s | 608GB/s | Published values; measure whether the workload benefits |
| Xe-cores / XMX engines | 20 / 160 | 20 / 160 | No listed compute-resource advantage for B65 |
| Clock / peak FP32 / INT8 | 2400MHz / 12.28 TFLOPS / 197 TOPS | 2400MHz / 12.28 TFLOPS / 197 TOPS | Shared peak figures do not prove equal application speed |
| Board power | 200W; 120–200W low-power range | 200W | Compare the exact provider configuration and wall energy |
| PCIe | 5.0 x8 | 5.0 x16 | Record negotiated width and offload traffic |
| Physical product | Partner form factor, connector, dimensions and warranty vary | Partner form factor, connector, dimensions and warranty vary | Neither has one universal retail board design |
What the extra 8GB changes for a 32B model
Official Qwen2.5-32B GGUF files create the same low-bit starting points but different upper boundaries. Margins are file-only and exclude KV cache, runtime workspace, allocator behavior, display use, context, modality and concurrency.
| Official artifact | Displayed size | 24GB B60 | 32GB B65 |
|---|---|---|---|
| Q2_K | 12.3GB | 11.7GB margin | 19.7GB margin |
| Q3_K_M | 15.9GB | 8.1GB margin | 16.1GB margin |
| Q4_K_M | 19.9GB | 4.1GB margin | 12.1GB margin |
| Q5_K_M | 23.3GB | 0.7GB: unsafe target | 8.7GB margin |
| Q6_K | 26.9GB | Does not fit wholly | 5.1GB margin |
| Q8_0 | 34.8GB | Does not fit wholly | Does not fit wholly |
Use the 32B requirements guide to calculate cache and runtime overhead. B65’s 5.1GB Q6_K file margin is still a constrained planning target, not proof of a successful fully resident run.
Choose B60 when
- The complete workload fits safely inside 24GB.
- The exact partner card is materially less expensive.
- The selected low-power configuration better suits the system.
- Measured results meet the target without paying for unused capacity.
Choose B65 when
- The complete allocation crosses 24GB or needs more cache/concurrency headroom.
- Q5_K_M- or Q6_K-class 32B files are important candidates.
- The exact x16 partner card, connector, chassis and cooling plan are acceptable.
- The delivered premium is justified by capacity and measured workload behavior.
Software and host memory can still decide the result
Both cards use Xe2 and carry Intel oneAPI, OpenVINO, IPEX, Vulkan and OpenCL support claims. Upstream llama.cpp support remains version-, backend-, build- and operator-specific. A closed B65 load report also showed that insufficient host RAM/swap can prevent a SYCL load even when the final model fits in VRAM. Record host RAM, swap, staging behavior, driver, oneAPI release, commit, backend, flags and output correctness.
How to compare them fairly
- Use the same model revision, quantization, context, cache, prompt/output profile, batch and concurrency.
- Record exact partner board, power limit, connector, cooling, display use and PCIe link.
- Pin OS/kernel, driver, oneAPI release, application commit, backend and flags.
- Record host RAM/swap, exposed and peak device memory, peak host memory, fallback/offload and load success.
- Measure TTFT, prompt processing, generation, wall power and output correctness over repeated runs.
Load the exact B60 and B65 starters separately. Each stages only hardware, capacity and topology prompts.
Read the B60 guide · Read the B65 guide · Compare all Intel tiers · Watch both families · Check screened observations
Primary sources
- Intel Arc Pro B60 specifications
- Intel Arc Pro B65 specifications
- Intel Arc Pro B65 datasheet
- Official Qwen2.5-32B-Instruct-GGUF repository
- llama.cpp SYCL documentation
- B65 host-memory/swap issue report
- HighVRAM methodology
Reviewed October 25, 2026. HighVRAM has not independently benchmarked either card. Verify current partner-board and software details.